[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Add AcpiMmio access for SMBus PCI device

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34914 )

Change subject: soc/amd/common: Add AcpiMmio access for SMBus PCI device
......................................................................

soc/amd/common: Add AcpiMmio access for SMBus PCI device

The PCI register space is accessible at 0xfed80000.  Add functions
for use as helpers.

Change-Id: Icbf5bdc449322c3f5e59e6126d709cb2808591d5
Signed-off-by: Marshall Dawson 
---
M src/soc/amd/common/block/acpimmio/mmio_util.c
M src/soc/amd/common/block/include/amdblocks/acpimmio.h
2 files changed, 44 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/34914/1

diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c
index edb3882..7fad456 100644
--- a/src/soc/amd/common/block/acpimmio/mmio_util.c
+++ b/src/soc/amd/common/block/acpimmio/mmio_util.c
@@ -65,7 +65,39 @@
    pm_io_write16(reg + sizeof(uint16_t), value & 0xffff);
 }

-/* smbus pci read/write - access registers at 0xfed80000 - currently unused */
+#if SUPPORTS_ACPIMMIO_SM_PCI_BASE
+/* smbus pci read/write - access registers at 0xfed80000 */
+
+u8 sm_pci_read8(u8 reg)
+{
+	return read8((void *)(ACPIMMIO_SM_PCI_BASE + reg));
+}
+
+u16 sm_pci_read16(u8 reg)
+{
+	return read16((void *)(ACPIMMIO_SM_PCI_BASE + reg));
+}
+
+u32 sm_pci_read32(u8 reg)
+{
+	return read32((void *)(ACPIMMIO_SM_PCI_BASE + reg));
+}
+
+void sm_pci_write8(u8 reg, u8 value)
+{
+	write8((void *)(ACPIMMIO_SM_PCI_BASE + reg), value);
+}
+
+void sm_pci_write16(u8 reg, u16 value)
+{
+	write16((void *)(ACPIMMIO_SM_PCI_BASE + reg), value);
+}
+
+void sm_pci_write32(u8 reg, u32 value)
+{
+	write32((void *)(ACPIMMIO_SM_PCI_BASE + reg), value);
+}
+#endif

#if SUPPORTS_ACPIMMIO_SMI_BASE
 /* smi read/write - access registers at 0xfed80200 */
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 32da867..0913a5a 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -20,6 +20,9 @@

/* iomap.h must indicate if the device uses a block, optional if unused. */
 #include <soc/iomap.h>
+#ifndef SUPPORTS_ACPIMMIO_SM_PCI_BASE
+  #define SUPPORTS_ACPIMMIO_SM_PCI_BASE		0
+#endif
 #ifndef SUPPORTS_ACPIMMIO_SMI_BASE
   #define SUPPORTS_ACPIMMIO_SMI_BASE		0
 #endif
@@ -161,6 +164,14 @@
 /* Enable the AcpiMmio range at 0xfed80000 */
 void enable_acpimmio_decode(void);

+/* Access SMBus PCI registers at 0xfed80000 */
+uint8_t sm_pci_read8(uint8_t reg);
+uint16_t sm_pci_read16(uint8_t reg);
+uint32_t sm_pci_read32(uint8_t reg);
+void sm_pci_write8(uint8_t reg, uint8_t value);
+void sm_pci_write16(uint8_t reg, uint16_t value);
+void sm_pci_write32(uint8_t reg, uint32_t value);
+
 /* Access PM registers using IO cycles */
 uint8_t pm_io_read8(uint8_t reg);
 uint16_t pm_io_read16(uint8_t reg);