[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/fatcat: Disable EnableFastVmode on Panther Lake H SoC

[Jérémy Compostella (Code Review)]

Attention is currently required from: Avi Uday, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik.

Hello Avi Uday, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/87505?usp=email

to look at the new patch set (#4).

Change subject: mb/google/fatcat: Disable EnableFastVmode on Panther Lake H SoC
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mb/google/fatcat: Disable EnableFastVmode on Panther Lake H SoC

This commit addresses a performance issue on the Panther Lake H SoC by
disabling the EnableFastVmode setting in addition to the CepEnable
setting. It was discovered that merely disabling CepEnable was
insufficient, as the FSP continued to program Panther Lake U IccLimit on
FastVMode capable boards, causing performance degradation under
high-stress conditions. By also disabling EnableFastVmode, the I_TRIP
value is prevented from being set lower than the device's actual
capability.

TEST=Verify that IccLimit is programmed with FSP default values.

Change-Id: I2974f1311b69f283d7fa4982c28a9037a8ab23f7
Signed-off-by: Jeremy Compostella 
---
M src/mainboard/google/fatcat/romstage.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/87505/4