Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44702 )
Change subject: soc/mediatek/mt8192: Do memory pll init before calibration
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Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44702/6/src/soc/mediatek/mt8192/dra...
File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44702/6/src/soc/mediatek/mt8192/dra...
PS6, Line 28: tmp = read32(&mtk_apmixed->mpll_con3);
: write32(&mtk_apmixed->mpll_con3, tmp & 0xfffffffd);
Could we use the SET32_BITFIELDS API? Or at least clrsetbits32?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ieb4e6cbf19da53d653872b166d3191c7b010dca6
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