Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33394 )
Change subject: stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enable ......................................................................
stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enable
This patch removes CONFIG_NO_STAGE_CACHE check from caller function and add empty inline function incase CONFIG_NO_STAGE_CACHE is enable.
Change-Id: I8e10ef2d261f9b204cecbeae6f65fda037753534 Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33394 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/arch/x86/postcar_loader.c M src/include/stage_cache.h M src/lib/prog_loaders.c 3 files changed, 11 insertions(+), 11 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Furquan Shaikh: Looks good to me, approved
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index e5d0cea..732b767 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -154,8 +154,7 @@
finalize_load(rsl.params, pcf->stack);
- if (!CONFIG(NO_STAGE_CACHE)) - stage_cache_add(STAGE_POSTCAR, prog); + stage_cache_add(STAGE_POSTCAR, prog); }
void run_postcar_phase(struct postcar_frame *pcf) diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h index 28cb859..192cfb9 100644 --- a/src/include/stage_cache.h +++ b/src/include/stage_cache.h @@ -32,14 +32,21 @@ STAGE_S3_DATA, };
+#if CONFIG(CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) \ + || CONFIG(RELOCATABLE_RAMSTAGE) /* Cache the loaded stage provided according to the parameters. */ void stage_cache_add(int stage_id, const struct prog *stage); +/* Load the cached stage at given location returning the stage entry point. */ +void stage_cache_load_stage(int stage_id, struct prog *stage); +#else /* CONFIG_NO_STAGE_CACHE */ +static inline void stage_cache_add(int stage_id, const struct prog *stage) {} +static inline void stage_cache_load_stage(int stage_id, struct prog *stage) {} +#endif + /* Cache non-specific data or code. */ void stage_cache_add_raw(int stage_id, const void *base, const size_t size); /* Get a pointer to cached raw data and its size. */ void stage_cache_get_raw(int stage_id, void **base, size_t *size); -/* Load the cached stage at given location returning the stage entry point. */ -void stage_cache_load_stage(int stage_id, struct prog *stage); /* Fill in parameters for the external stage cache, if utilized. */ void stage_cache_external_region(void **base, size_t *size);
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index a21663f..81ec2ec 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -74,11 +74,6 @@ halt(); }
-void __weak stage_cache_add(int stage_id, - const struct prog *stage) {} -void __weak stage_cache_load_stage(int stage_id, - struct prog *stage) {} - static void ramstage_cache_invalid(void) { printk(BIOS_ERR, "ramstage cache invalid.\n"); @@ -155,8 +150,7 @@ } else if (load_nonrelocatable_ramstage(&ramstage)) goto fail;
- if (!CONFIG(NO_STAGE_CACHE)) - stage_cache_add(STAGE_RAMSTAGE, &ramstage); + stage_cache_add(STAGE_RAMSTAGE, &ramstage);
timestamp_add_now(TS_END_COPYRAM);