Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87002?usp=email )
Change subject: mb/google/nissa/var/meliks: Replace SPD for RAMID 2 with Samsung K3KL8L80CM-MGCT ......................................................................
mb/google/nissa/var/meliks: Replace SPD for RAMID 2 with Samsung K3KL8L80CM-MGCT
Meliks cannot use Samsung K3KL8L80DM-MGCU memory part since Twin Lake platform can only support memory parts that support 8B mode but this part doesn't support it.
So we would replace the usage of RAMID 2 (b'0010) with the SPD for this part which supports 8B mode.
- Samsung K3KL8L80CM-MGCT
BUG=b:402600450 BRANCH=nissa TEST=FW_NAME=meliks emerge-nissa coreboot
Change-Id: I7c05b79ca018f68260e71d4f749ecb8573987358 Signed-off-by: Seunghwan Kim sh_.kim@samsung.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/87002 Reviewed-by: NyeonWoo Kim Reviewed-by: Dinesh Gehlot digehlot@google.com Reviewed-by: Eric Lai ericllai@google.com Reviewed-by: Kapil Porwal kapilporwal@google.com Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Jayvik Desai jayvik@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@mailbox.org --- M src/mainboard/google/brya/variants/meliks/memory/Makefile.mk M src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt 3 files changed, 3 insertions(+), 3 deletions(-)
Approvals: Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved Jayvik Desai: Looks good to me, approved NyeonWoo Kim: Looks good to me, but someone else must approve Paul Menzel: Looks good to me, but someone else must approve Dinesh Gehlot: Looks good to me, approved Kapil Porwal: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk b/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk index 1f7a706..fcf05a1 100644 --- a/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk +++ b/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk @@ -6,4 +6,4 @@ SPD_SOURCES = SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 0(0b0000) Parts = K3KL6L60GM-MGCT SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B -SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 2(0b0010) Parts = K3KL8L80DM-MGCU +SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 2(0b0010) Parts = K3KL8L80CM-MGCT diff --git a/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt index 5ca8b34..06108bd 100644 --- a/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt @@ -6,4 +6,4 @@ DRAM Part Name ID to assign K3KL6L60GM-MGCT 0 (0000) MT62F512M32D2DR-031 WT:B 1 (0001) -K3KL8L80DM-MGCU 2 (0010) +K3KL8L80CM-MGCT 2 (0010) diff --git a/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt index cb07b52..7566a29 100644 --- a/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt @@ -11,4 +11,4 @@ # Part Name K3KL6L60GM-MGCT MT62F512M32D2DR-031 WT:B -K3KL8L80DM-MGCU +K3KL8L80CM-MGCT