build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36221 )
Change subject: Add configurable ramstage support for minimal PCI scanning ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36221/5/src/include/device/device.h File src/include/device/device.h:
https://review.coreboot.org/c/coreboot/+/36221/5/src/include/device/device.h... PS5, Line 132: unsigned int mandatory : 1; /* set if this device is used even in minimum PCI cases */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/36221/5/util/sconfig/lex.yy.c_shipp... File util/sconfig/lex.yy.c_shipped:
https://review.coreboot.org/c/coreboot/+/36221/5/util/sconfig/lex.yy.c_shipp... PS5, Line 162: trailing whitespace