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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59752 )
Change subject: soc/intel/alderlake: Add support for ADL-N PCH
......................................................................
Patch Set 8: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59752/comment/3e683fed_9220b0fb
PS8, Line 8:
: Introduce the `SOC_INTEL_ALDERLAKE_PCH_N` Kconfig option and
: use it to specify the correct amount of PCIe I/O.
:
: Document number 645550 indicates that Alder Lake-N has
: 12 PCH root ports and no CPU root ports.
:
: Document number 645548 indicates ADL-N has 5 clock sources
: and 5 clock request signals.
nit: reflow for 72 characters wide in commit messages
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