[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp: Use common cpu/intel romstage entry

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Christian Walter, Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46658

to look at the new patch set (#6).

Change subject: soc/intel/xeon_sp: Use common cpu/intel romstage entry
......................................................................

soc/intel/xeon_sp: Use common cpu/intel romstage entry

This removes some boilerplate like starting the console and also adds
a "start of romstage" timestamp.

Change-Id: Ie85df5d244fa37c41f0b3177ca325c607fa54593
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/xeon_sp/Kconfig
M src/soc/intel/xeon_sp/Makefile.inc
M src/soc/intel/xeon_sp/memmap.c
M src/soc/intel/xeon_sp/romstage.c
4 files changed, 24 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/46658/6