Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33435
Change subject: mb/intel/whl_rvp: Configure FSP UPDs of DDI ports for whlrvp ......................................................................
mb/intel/whl_rvp: Configure FSP UPDs of DDI ports for whlrvp
This patch configures FSP UPD values for HPD and DDC of DDI ports for WHLRVP.
BUG=none TEST= Tested that eDP & DP works on WHLRVP
Signed-off-by: Usha P usha.p@intel.com Signed-off-by: sridhar sridhar.siricilla@intel.com Change-Id: I576469f5564e3e56159762752dbe4557e9dc1912 --- M src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb 1 file changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33435/1
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb index e30da3a..727b009 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb @@ -9,6 +9,19 @@ register "ScsEmmcHs400Enabled" = "1" register "HeciEnabled" = "1"
+ # Enable eDP device + register "DdiPortEdp" = "1" + # Enable HPD for DDI ports B/C + register "DdiPortBHpd" = "1" + register "DdiPortCHpd" = "1" + register "DdiPortDHpd" = "1" + register "DdiPortFHpd" = "1" + # Enable DDC for DDI ports B/C + register "DdiPortBDdc" = "1" + register "DdiPortCDdc" = "1" + register "DdiPortDDdc" = "1" + register "DdiPortFDdc" = "1" + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" register "usb2_ports[2]" = "USB2_PORT_MID(OC0)"