Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38624 )
Change subject: soc/intel/tigerlake: Configure TCSS xHCI and xDCI
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Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38624/3/src/soc/intel/tigerlake/chi...
File src/soc/intel/tigerlake/chip.h:
https://review.coreboot.org/c/coreboot/+/38624/3/src/soc/intel/tigerlake/chi...
PS3, Line 233: TcssAuxOri
Done
partner bug - I think it can be done as part of the same bug for TCSS enabling. For IomCPortPadCfg -- yes, a separate bug is required to capture the progress of adding registers to EDS and adding support to coreboot for doing the configuration.
About keeping the params in chip.h -- Sure. I haven't looked at all the details of the register bits yet, but some information will be required from mainboard to do this configuration.
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