Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46437 )
Change subject: mb/volteer: New variant for EVT reworked with Dauntless ......................................................................
Patch Set 3:
(2 comments)
Nick and Caveh, I have never tried creating a new board variant, but I assume that you have.
Could you please sanity check this one. I am basically forking volteer2, to have a new variant using a I2C bus for communication with the TPM chip, instead of SPI. To aid the development work of the new Dauntless TPM chip.
Also, I think I need help for what other configuration changes are required, to have this firmware become part of the GoldenEye images.
https://review.coreboot.org/c/coreboot/+/46437/3/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/volteer2_ti50/gpio.c:
https://review.coreboot.org/c/coreboot/+/46437/3/src/mainboard/google/voltee... PS3, Line 248: PAD_CFG_NF(GPP_C19, UP_2K, DEEP, NF1), /* PCH_I2C1_TOUCH_USI_SCL */ The two lines above are added to use the I2C bus 1 early, for TPM communication.
https://review.coreboot.org/c/coreboot/+/46437/3/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/volteer2_ti50/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46437/3/src/mainboard/google/voltee... PS3, Line 133: chip drivers/i2c/tpm This section has been added, to allow the kernel to find the I2C TPM (hopefully).