Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32275
Change subject: soc/intel/cannonlake: Select FSP_M_XIP ......................................................................
soc/intel/cannonlake: Select FSP_M_XIP
Cannon lake and family require that FSP-M component should be XIP. This change selects FSP_M_XIP so that the right arguments are passed into cbfstool when adding this component.
BUG=b:130306520 TEST=Verified that hatch boots fine to OS.
Change-Id: Ifd8a829ebdc7681c81ece4540aa38cdcea7b6fac Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/32275/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 55fef5a..c30b562 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -60,6 +60,7 @@ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP select INTEL_DESCRIPTOR_MODE_CAPABLE