Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10833
-gerrit
commit 5bcaf3b057924858be0bc4ae0b632f867f51c7da Author: Stefan Reinauer stefan.reinauer@coreboot.org Date: Tue Jul 7 17:17:32 2015 -0700
memlayout: Add timestamp regions for t210 and cygnus
This is needed to make those SOCs compile with timestamps enabled.
Change-Id: Iac20cb9911e1c76a18c8530385c9d7b8b46399e5 Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/soc/broadcom/cygnus/include/soc/memlayout.ld | 1 + src/soc/nvidia/tegra210/include/soc/memlayout.ld | 3 ++- src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld | 1 + 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld index 3f6e8d8..5e149b4 100644 --- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld +++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld @@ -34,6 +34,7 @@ SECTIONS VBOOT2_WORK(0x02010000, 16K) OVERLAP_VERSTAGE_ROMSTAGE(0x02014000, 120K) PRERAM_CBFS_CACHE(0x02032000, 1K) + TIMESTAMP(0x02032400, 1K) STACK(0x02033000, 12K) REGION(reserved_for_secure_service_api, 0x0203F000, 4K, 4) SRAM_END(0x02040000) diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout.ld b/src/soc/nvidia/tegra210/include/soc/memlayout.ld index df9eed5..526fbbe 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout.ld @@ -34,7 +34,8 @@ SECTIONS PRERAM_CBMEM_CONSOLE(0x40000000, 8K) PRERAM_CBFS_CACHE(0x40002000, 84K) STACK(0x40017000, 16K) - BOOTBLOCK(0x4001B000, 26K) + TIMESTAMP(0x4001B000, 2K) + BOOTBLOCK(0x4001B800, 24K) ROMSTAGE(0x40022000, 120K) SRAM_END(0x40040000)
diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld index 5c8f346..26c6e34 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld @@ -36,6 +36,7 @@ SECTIONS PRERAM_CBFS_CACHE(0x40002000, 72K) VBOOT2_WORK(0x40014000, 16K) STACK(0x40018000, 2K) + TIMESTAMP(0x40018800, 2K) BOOTBLOCK(0x40019000, 24K) VERSTAGE(0x4001F000, 52K) ROMSTAGE(0x4002C000, 80K)