Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34662 )
Change subject: Documentation/binaries: Add AMD FSP documentation ......................................................................
Patch Set 2:
(5 comments)
https://review.coreboot.org/c/coreboot/+/34662/1/Documentation/binaries/AMD_... File Documentation/binaries/AMD_FSP_family_17h.md:
https://review.coreboot.org/c/coreboot/+/34662/1/Documentation/binaries/AMD_... PS1, Line 4: FSP
FSP 2.0? If so, will do.
yes
https://review.coreboot.org/c/coreboot/+/34662/1/Documentation/binaries/AMD_... PS1, Line 22: inittialized
?
spelling
https://review.coreboot.org/c/coreboot/+/34662/1/Documentation/binaries/AMD_... PS1, Line 27: . **FSP-M can be made position independent** : Because it's loaded to memory and does not uses CAR, FSP-M can be made PIC : (Position Independent Code).
No, but Intel's FSP is highly position dependent. […]
I would find a way to reword the statement, then, because the Intel FSP can also be loaded to memory.
It may still be a valid point you're trying to make. I looked more closely at the the driver code and it loads it at an address it gets from the header.
https://review.coreboot.org/c/coreboot/+/34662/1/Documentation/binaries/AMD_... PS1, Line 37: 3. **UPD with no UEFI dependencies** : UPD interface can be made C99 or C11 compatible with no hard dependencies : to UEFI.
Pretty much all of "engineering decisions" were Alex. I just rephrase his crude statement.
Is this from a recent conversation or from some of the early planning documents? Things have been evolving since then and our implementation will be more FSP_2.0-compliant than he originally hoped.
https://review.coreboot.org/c/coreboot/+/34662/1/Documentation/binaries/AMD_... PS1, Line 40: 4. **Platform specific code**
Alex said so, will investigate. He implied that Intel's does not do such calls.
It's not designed into the interface definition, but the Ice Lake implementation can pass in a pointer to a PPI that sits in coreboot. Then I assume the FSP simply installs the PPI. It actually seems way simpler than the AGESA v5 and binaryPI method for callouts.