[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Correct FSP log interface

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39280 )

Change subject: soc/intel/tigerlake: Correct FSP log interface
......................................................................

soc/intel/tigerlake: Correct FSP log interface

select correct UART settings according to Kconfig
DEBUG_INTERFACE_UART: Legacy UART
DEBUG_INTERFACE_SERIAL_IO: PCH UART

Add check for DEBUG_INTERFACE_TRACEHUB selection and set
"PcdDebugInterfaceFlags" UPD accordingly.

BUG=None
TEST=boot jslrvp board with Debug FSP and check FSP UART log
Change-Id: I7be7f93082f9c64c1c45963d70ee2e3b3d29986a
Signed-off-by: Ronak Kanabar 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39280
Tested-by: build bot (Jenkins) 
Reviewed-by: Aamir Bohra 
---
M src/soc/intel/tigerlake/chip.h
M src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
2 files changed, 17 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Aamir Bohra: Looks good to me, approved

diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index d2ea0dd..d23148a 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -193,6 +193,12 @@
     */
    uint8_t SerialIoGSpiCsState[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];

+	/*
+	 * TraceHubMode config
+	 * 0: Disable, 1: Target Debugger Mode, 2: Host Debugger Mode
+	 */
+	uint8_t TraceHubMode;
+
    /* Debug interface selection */
    enum {
    	DEBUG_INTERFACE_RAM = (1 << 0),
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
index 9c70f2e..a5c4c90 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
@@ -69,8 +69,18 @@

/* Set CPU Ratio */
    m_cfg->CpuRatio = 0;
+
+	/* Set debug interface flags */
    m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
-			DEBUG_INTERFACE_UART : DEBUG_INTERFACE_TRACEHUB;
+			DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
+
+	/* TraceHub configuration */
+	dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
+	if (dev && dev->enabled && config->TraceHubMode) {
+		m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB;
+		m_cfg->PchTraceHubMode = config->TraceHubMode;
+		m_cfg->CpuTraceHubMode = config->TraceHubMode;
+	}

/* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */
    m_cfg->VmxEnable = CONFIG(ENABLE_VMX);