Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37351 )
Change subject: AGESA,binaryPI: Fix stack location on entry to romstage ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37351/1/src/drivers/amd/agesa/cache... File src/drivers/amd/agesa/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/37351/1/src/drivers/amd/agesa/cache... PS1, Line 46: mov $LAPIC_BASE_MSR, %ecx Shouldn't SOC_AMD_COMMON_BLOCK_CAR have the same fix? Arthur already pointed that in my previous patch and you probably intended to fix that in yours