EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48340 )
Change subject: soc/intel/alderlake: Revise PCIE port config
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Patch Set 23:
Patch Set 22:
Patch Set 22:
@Meera and Subrata, have you try this on RVP?
Hi Eric, i'll try this today. Can you please rebase this CL?
Done. BTW,it would be better to dump PCIE config in the FSP log to check the CL work or not :) Thank you!
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I0b390e43f8e99b19cfad178139b86a2f77d7a57b
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Gerrit-Comment-Date: Tue, 15 Dec 2020 04:19:18 +0000
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