[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Update 64 bit SA DRAM bit fields as per SKL EDS

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38514 )

Change subject: soc/intel/skylake: Update 64 bit SA DRAM bit fields as per SKL EDS
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38514/2/src/soc/intel/skylake/acpi/... 
File src/soc/intel/skylake/acpi/systemagent.asl:

https://review.coreboot.org/c/coreboot/+/38514/2/src/soc/intel/skylake/acpi/... 
PS2, Line 46: 28
> The datasheet (doc 332688) says that bits 27 and 26 are either part of the PCIEXBAR field or part of […]

i will modify this patchset and https://review.coreboot.org/c/coreboot/+/38456 as well, it should start from 26bit as value of LENGTH also matter in total base calculation