HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45526 )
Change subject: soc/amd/{picasso,stoneyridge}/romstage.c: Use post_codes macros ......................................................................
soc/amd/{picasso,stoneyridge}/romstage.c: Use post_codes macros
Change-Id: I51782996602a4ae17058e6ff85d4e05f751a2bfd Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/amd/picasso/romstage.c M src/soc/amd/stoneyridge/romstage.c 2 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/45526/1
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index b967431..09fc987 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -145,7 +145,7 @@ { int s3_resume;
- post_code(0x40); + post_code(POST_CONSOLE_BOOT_MSG); console_init();
post_code(0x41); diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 96103ef..0940569 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -69,7 +69,7 @@ bsp_agesa_call();
if (!s3_resume) { - post_code(0x40); + post_code(POST_CONSOLE_BOOT_MSG); do_agesawrapper(AMD_INIT_POST, "amdinitpost");
post_code(0x41); @@ -102,7 +102,7 @@ wrmsr(SYSCFG_MSR, sys_cfg); } else { printk(BIOS_INFO, "S3 detected\n"); - post_code(0x60); + post_code(POST_ENABLING_CACHE); do_agesawrapper(AMD_INIT_RESUME, "amdinitresume");
post_code(0x61);