build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47286 )
Change subject: soc/intel/jasperlake: Enable Intel FIVR RFI settings ......................................................................
Patch Set 1:
(6 comments)
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... File src/soc/intel/jasperlake/chip.h:
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... PS1, Line 346: /* trailing whitespace
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... PS1, Line 349: * 0: Auto. trailing whitespace
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... PS1, Line 350: * Range varies based on XTAL clock: trailing whitespace
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... PS1, Line 356: /* trailing whitespace
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... PS1, Line 358: * Set the Spread Spectrum Range. <b>1.5%</b>; trailing whitespace
https://review.coreboot.org/c/coreboot/+/47286/1/src/soc/intel/jasperlake/ch... PS1, Line 359: * Range: 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%,6%. trailing whitespace