[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/cse: Add `finalize` operation for CSE

[Subrata Banik (Code Review)]

Attention is currently required from: Arthur Heymans, Felix Singer, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Lean Sheng Tan, Werner Zeh, Patrick Rudolph, EricR Lai.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 )

Change subject: soc/intel/common/cse: Add `finalize` operation for CSE
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Patch Set 24:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/60405/comment/e7f53531_ccfccc1a 
PS23, Line 26: CSE: EOP requested action: continue boot
> nit: this is bit misleading in the flow? do you feel so if you read logs?

I'm unable to follow you. Refer to below code https://github.com/coreboot/coreboot/blame/0eef54b8be1329e273413486f0eb764ea...

Kindly pick the code change if you feel something needs improvement

File src/soc/intel/common/basecode/eop/Kconfig:

https://review.coreboot.org/c/coreboot/+/60405/comment/454836dd_bd4bcd21 
PS23, Line 9: instead
> nit: instead of

Ack

File src/soc/intel/common/basecode/eop/eop.c:

https://review.coreboot.org/c/coreboot/+/60405/comment/252cd86e_9111a08e 
PS23, Line 13: Sending
> nit: Send

Ack

https://review.coreboot.org/c/coreboot/+/60405/comment/29c2b8a8_cbe371dc 
PS23, Line 20: static void do_eop_operations(void *unused)
             : {
             : 	if (CONFIG(SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT)) {
             : 		/* Step 1 */
             : 		cse_send_end_of_post();
             : 
             : 		/* Step 2 */
             : 		cse_lock_config();
             : 
             : 		/* Step 3 */
             : 		if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) {
             : 			cse_set_to_d0i3();
             : 			heci1_disable();
             : 		}
             : 	}
             : 
             : 	if (CONFIG(SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) {
             : 		/* Step 4 */
             : 		heci_set_to_d0i3();
             : 		/* Step 5 */
             : 		pmc_clear_pmcon_sts();
             : 	}
             : }
> > For CSE and SPI, yes. […]

Ack