Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63752 )
Change subject: nb/intel/i945/memmap.c: Fix TOLUD bit field mask ......................................................................
nb/intel/i945/memmap.c: Fix TOLUD bit field mask
Register TOLUD is defined as bit field 7:3 (section 5.1.26, page 103, i945GM datasheet), fix the mask accordingly.
Change-Id: Ia27661084e11ea93d5f0dc20bafb488ae2995b49 Signed-off-by: Petr Cvek petrcvekcz@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/63752 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Elyes Haouas ehaouas@noos.fr --- M src/northbridge/intel/i945/memmap.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index 1dea21c..58e29c8 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -40,7 +40,7 @@ /* IGD enabled, get top of Memory from BSM register */ tom = pci_read_config32(IGD_DEV, BSM); else - tom = (pci_read_config8(HOST_BRIDGE, TOLUD) & 0xf7) << 24; + tom = (pci_read_config8(HOST_BRIDGE, TOLUD) & 0xf8) << 24;
/* subtract TSEG size */ tom -= decode_tseg_size(pci_read_config8(HOST_BRIDGE, ESMRAMC));
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.