Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36124 )
Change subject: nb/intel: Remove unused 'barrier()' ......................................................................
nb/intel: Remove unused 'barrier()'
Change-Id: I0c33a1f3f9c33c15a901fe90258ed989e9641701 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/36124 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/northbridge/intel/fsp_rangeley/northbridge.h M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/i945/i945.h M src/northbridge/intel/nehalem/nehalem.h M src/northbridge/intel/sandybridge/sandybridge.h 5 files changed, 0 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h index 8375fbf..fd5fa05 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.h +++ b/src/northbridge/intel/fsp_rangeley/northbridge.h @@ -52,7 +52,6 @@ #define P_UNIT 4
#ifndef __ASSEMBLER__ -static inline void barrier(void) { asm("" ::: "memory"); }
#define PCI_DEVICE_ID_RG_MIN 0x1F00 #define PCI_DEVICE_ID_RG_MAX 0x1F0F diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index bd89609..fce9416 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -202,7 +202,6 @@ #define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__ -static inline void barrier(void) { asm("" ::: "memory"); }
void intel_northbridge_haswell_finalize_smm(void);
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 69a6413..4dd5379 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -361,8 +361,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
-static inline void barrier(void) { asm("" ::: "memory"); } - int i945_silicon_revision(void); void i945_early_initialization(void); void i945_late_initialization(int s3resume); diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index bff5595..ebec63d 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -245,7 +245,6 @@ #define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__ -static inline void barrier(void) { asm("" ::: "memory"); }
#define PCI_DEVICE_ID_SB 0x0104 #define PCI_DEVICE_ID_IB 0x0154 diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index d505728..8664c5d 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -202,7 +202,6 @@ #define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__ -static inline void barrier(void) { asm("" ::: "memory"); }
#ifdef __SMM__ void intel_sandybridge_finalize_smm(void);