Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29326 )
Change subject: security/tpm: Move TPM2 NVRAM specific settings ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/#/c/29326/5/src/security/tpm/tss/tcg-2.0/tss_str... File src/security/tpm/tss/tcg-2.0/tss_structures.h:
https://review.coreboot.org/#/c/29326/5/src/security/tpm/tss/tcg-2.0/tss_str... PS5, Line 161: 0x94, 0x46, 0x62, 0x26, 0x68, 0x8E, 0xEE, 0xE6, 0x6A, 0xA1};
What is this? how is this related to NVRAM?
NVRAM policy
https://review.coreboot.org/#/c/29326/5/src/security/vboot/secdata_tpm.c File src/security/vboot/secdata_tpm.c:
https://review.coreboot.org/#/c/29326/5/src/security/vboot/secdata_tpm.c@41 PS5, Line 41:
missing include for tss_structures. […]
Already exposed through tss.h -> tspi.h