[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: add PcieRpAspm and PchPmPciePllSsc

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39330 )

Change subject: soc/intel/tigerlake: add PcieRpAspm and PchPmPciePllSsc
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39330/1/src/soc/intel/tigerlake/chi... 
File src/soc/intel/tigerlake/chip.h:

https://review.coreboot.org/c/coreboot/+/39330/1/src/soc/intel/tigerlake/chi... 
PS1, Line 128: Aspm
ASPM