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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63982
to look at the new patch set (#2).
Change subject: soc/intel/cmn/spi: Add ACPI SSDT extension for fast SPI ......................................................................
soc/intel/cmn/spi: Add ACPI SSDT extension for fast SPI
On Apollo Lake the fast SPI controller is located on a multi-function PCI device which is hidden after coreboot passes over to the payload. This makes it impossible for the OS to probe the PCI device and therefore the OS is not aware of the resources the SPI controller has occupied. In some circumstances it is possible that the OS moves other PCI resources around and therefore a conflict can be introduced where the moved resource will shadow the fast SPI BAR. This will make the SPI controller inaccessible from the OS. As a consequence of this flashrom is not able to access the SPI flash device.
On current master the siemens mainboard mc_apl4 is affected by this issue and all other Apollo Lake based boards are potentially affected, too. This patch adds a SSDT extension to the common SPI driver which for now is only handling the fast SPI controller of Apollo Lake. It reports the BAR0 resource of the fast SPI controller via ACPI to the OS. Since there is no defined ACPI ID for the fast SPI controller of Apollo Lake available now, the generic one (PNP0C02) is used.
Test: Boot mc_apl4 and make sure flashrom works again.
Change-Id: Ifa89cdf41f42d4df5b46f095e22924157d9f3c3f Signed-off-by: Werner Zeh werner.zeh@siemens.com --- M src/soc/intel/common/block/spi/spi.c 1 file changed, 73 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/63982/2