Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46376 )
Change subject: [TEST]sec/intel/txt/getsec_enteraccs.S: Make sure the MTRR save hits dram ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46376/3/src/security/intel/txt/gets... File src/security/intel/txt/getsec_enteraccs.S:
https://review.coreboot.org/c/coreboot/+/46376/3/src/security/intel/txt/gets... PS3, Line 111: Writeback nit: `Write back`, and also comment style
https://review.coreboot.org/c/coreboot/+/46376/3/src/security/intel/txt/gets... PS3, Line 114: SCLEAN On Haswell, I need a slightly different prologue for SCLEAN in romstage. The MTRR algorithm is pretty much the same, though