[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell: add ACPI backlight support

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39941 )

Change subject: soc/intel/broadwell: add ACPI backlight support
......................................................................

soc/intel/broadwell: add ACPI backlight support

Add framework to generate ACPI methods in SSDT for
screen backlight control. Adjust params for gtt_ methods
to match prototypes in i915.h and avoid conflicts.

To make use of this, individual boards will need to
include default_brightness_levels.asl in their dsdt, as
well as add 'register "gfx" = "GMA_STATIC_DISPLAYS(0)"' to
their devicetree.

Change-Id: If93b7690ef36b5d19ca43957e8a1bef91ec5821d
Signed-off-by: Matt DeVillier 
---
M src/soc/intel/broadwell/chip.h
M src/soc/intel/broadwell/igd.c
2 files changed, 29 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/39941/1

diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h
index fabb95a..5ad7086 100644
--- a/src/soc/intel/broadwell/chip.h
+++ b/src/soc/intel/broadwell/chip.h
@@ -12,6 +12,8 @@
  * GNU General Public License for more details.
  */

+#include <drivers/intel/gma/i915.h>
+
 #ifndef _SOC_INTEL_BROADWELL_CHIP_H_
 #define _SOC_INTEL_BROADWELL_CHIP_H_

@@ -130,6 +132,8 @@
     */
    int cdclk;

+	struct i915_gpu_controller_info gfx;
+
    /* Enable S0iX support */
    int s0ix_enable;

diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index ecb5417..7769410 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -24,11 +24,13 @@
 #include <string.h>
 #include <reg_script.h>
 #include <cbmem.h>
+#include <drivers/intel/gma/i915.h>
 #include <drivers/intel/gma/i915_reg.h>
 #include <drivers/intel/gma/libgfxinit.h>
 #include <drivers/intel/gma/opregion.h>
 #include <soc/cpu.h>
 #include <soc/nvs.h>
+#include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/ramstage.h>
 #include <soc/systemagent.h>
@@ -258,7 +260,7 @@

static struct resource *gtt_res = NULL;

-static unsigned long gtt_read(unsigned long reg)
+u32 gtt_read(u32 reg)
 {
    u32 val;
    val = read32(res2mmio(gtt_res, reg, 0));
@@ -266,7 +268,7 @@

}

-static void gtt_write(unsigned long reg, unsigned long data)
+void gtt_write(u32 reg, u32 data)
 {
    write32(res2mmio(gtt_res, reg, 0), data);
 }
@@ -279,9 +281,8 @@
    gtt_write(reg, val);
 }

-static int gtt_poll(u32 reg, u32 mask, u32 value)
-{
-	unsigned int try = GT_RETRY;
+int gtt_poll(u32 reg, u32 mask, u32 value)
+{	unsigned int try = GT_RETRY;
    u32 data;

while (try--) {
@@ -627,11 +628,30 @@
    return current;
 }

+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	struct device *dev = pcidev_on_root(SA_DEV_SLOT_IGD, 0);
+	if (!dev || !dev->enabled)
+		return NULL;
+
+	struct soc_intel_broadwell_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(struct device *device)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (gfx)
+		drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct device_operations igd_ops = {
    .read_resources		= &pci_dev_read_resources,
    .set_resources		= &pci_dev_set_resources,
    .enable_resources	= &pci_dev_enable_resources,
    .init			= &igd_init,
+	.acpi_fill_ssdt_generator = gma_ssdt,
    .ops_pci		= &broadwell_pci_ops,
    .write_acpi_tables	= gma_write_acpi_tables,
 };