Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/libgfxinit/+/27053 )
Change subject: gma config: Introduce Is_ULT ......................................................................
gma config: Introduce Is_ULT
Change-Id: I545d74ba6cadb06479b29b85aa9dc2af2be564d6 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/27053 Reviewed-by: Angel Pons th3fanbus@gmail.com --- M common/hw-gfx-gma-config.ads.template M common/skylake/hw-gfx-gma-connectors-ddi-buffers.adb 2 files changed, 14 insertions(+), 18 deletions(-)
Approvals: Nico Huber: Verified Angel Pons: Looks good to me, approved
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 968ccc7..a922b05 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -41,6 +41,7 @@ Internal_Is_EDP : constant Boolean := Internal_Display = DP; Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC; Has_Presence_Straps : constant Boolean := CPU /= Broxton; + Is_ULT : constant Boolean := CPU_Var = ULT;
----- CPU pipe: -------- Has_Tertiary_Pipe : constant Boolean := CPU >= Ivybridge; @@ -73,7 +74,7 @@ Has_PCH : constant Boolean := CPU /= Broxton and CPU /= G45; Has_PCH_DAC : constant Boolean := CPU in Ironlake .. Ivybridge or (CPU in Haswell .. Broadwell - and CPU_Var = Normal); + and not Is_ULT);
Has_PCH_Aux_Channels : constant Boolean := CPU in Ironlake .. Broadwell;
@@ -97,13 +98,13 @@ Has_Per_DDI_Clock_Sel : constant Boolean := CPU in Haswell .. Broadwell; Has_HOTPLUG_CTL : constant Boolean := CPU in Haswell .. Broadwell; Has_SHOTPLUG_CTL_A : constant Boolean := (CPU in Haswell .. Broadwell - and CPU_Var = ULT) or + and Is_ULT) or CPU >= Skylake;
Has_DDI_PHYs : constant Boolean := CPU = Broxton;
Has_DDI_D : constant Boolean := CPU >= Haswell and - CPU_Var = Normal and + not Is_ULT and not Has_DDI_PHYs; Has_DDI_E : constant Boolean := -- might be disabled by x4 eDP Has_DDI_D; @@ -121,8 +122,7 @@ Has_PCH_GMBUS : constant Boolean := CPU >= Ironlake;
----- Power: ----------- - Has_IPS : constant Boolean := (CPU = Haswell and - CPU_Var = ULT) or + Has_IPS : constant Boolean := (CPU = Haswell and Is_ULT) or CPU = Broadwell; Has_IPS_CTL_Mailbox : constant Boolean := CPU = Broadwell;
@@ -248,10 +248,7 @@ Sandybridge | Ivybridge => 125_000_000, when Haswell | - Broadwell => (if CPU_Var = Normal then - 125_000_000 - else - 24_000_000), + Broadwell => (if Is_ULT then 24_000_000 else 125_000_000), when Broxton => Frequency_Type'First, -- none needed when Skylake => 24_000_000);
diff --git a/common/skylake/hw-gfx-gma-connectors-ddi-buffers.adb b/common/skylake/hw-gfx-gma-connectors-ddi-buffers.adb index 34ee980..5e72a3b 100644 --- a/common/skylake/hw-gfx-gma-connectors-ddi-buffers.adb +++ b/common/skylake/hw-gfx-gma-connectors-ddi-buffers.adb @@ -101,15 +101,14 @@ else Config.Default_DDI_HDMI_Buffer_Translation); begin Trans := - (case Config.CPU_Var is - when Normal => - (if DDIA_Low_Voltage_Swing - then Skylake_Trans_EDP - else Skylake_Trans_DP), - when ULT => - (if DDIA_Low_Voltage_Swing - then Skylake_U_Trans_EDP - else Skylake_U_Trans_DP)); + (if not Config.Is_ULT then + (if DDIA_Low_Voltage_Swing + then Skylake_Trans_EDP + else Skylake_Trans_DP) + else + (if DDIA_Low_Voltage_Swing + then Skylake_U_Trans_EDP + else Skylake_U_Trans_DP)); if not DDIA_Low_Voltage_Swing then Trans (18) := Skylake_Trans_HDMI (HDMI_Trans).Trans1; Trans (19) := Skylake_Trans_HDMI (HDMI_Trans).Trans2;