[coreboot-gerrit] [S] Change in coreboot[main]: mb/google/nissa/var/rull: Change gpio_padbased_override to rtd3

[Rui Zhou (Code Review)]

Rui Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85000?usp=email )

Change subject: mb/google/nissa/var/rull: Change gpio_padbased_override to rtd3
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mb/google/nissa/var/rull: Change gpio_padbased_override to rtd3

The previous method made cnvi wifi6 configuration cumbersome and unusable.
We abandoned the fw_config judgment method and changed to the better rtd3.

BUG=b:374629673
BRANCH=None
TEST=1. emerge-nissa coreboot chromeos-bootimage
     2. wifi7&wifi6 function is normal

Change-Id: Ia95dc9f6b707db63840de9b15b38bdaea48ea192
Signed-off-by: Rui Zhou 
---
M src/mainboard/google/brya/variants/rull/gpio.c
M src/mainboard/google/brya/variants/rull/overridetree.cb
M src/mainboard/google/brya/variants/rull/variant.c
3 files changed, 12 insertions(+), 20 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/85000/1

diff --git a/src/mainboard/google/brya/variants/rull/gpio.c b/src/mainboard/google/brya/variants/rull/gpio.c
index a8bec3d..dc3f454 100644
--- a/src/mainboard/google/brya/variants/rull/gpio.c
+++ b/src/mainboard/google/brya/variants/rull/gpio.c
@@ -82,6 +82,8 @@
    PAD_NC_LOCK(GPP_H22, NONE, LOCK_CONFIG),
    /* H23 : WWAN_SAR_DETECT_ODL ==> NA */
    PAD_NC_LOCK(GPP_H23, NONE, LOCK_CONFIG),
+	/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
+	PAD_CFG_GPO(GPP_H20, 1, DEEP),

/* R6 : DMIC_CLK_A_1A ==> DMIC_WCAM_CLK_R */
    PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3),
diff --git a/src/mainboard/google/brya/variants/rull/overridetree.cb b/src/mainboard/google/brya/variants/rull/overridetree.cb
index 0b4042e..b59a0de 100644
--- a/src/mainboard/google/brya/variants/rull/overridetree.cb
+++ b/src/mainboard/google/brya/variants/rull/overridetree.cb
@@ -274,6 +274,13 @@
    			register "add_acpi_dma_property" = "true"
    			device pci 00.0 on end
    		end
+			chip soc/intel/common/block/pcie/rtd3
+				# # enable_gpio is controlled by the EC with EC_EN_PP3300_WLAN
+				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
+				register "srcclk_pin" = "2"
+				device generic 0 on end
+			end
    		probe WIFI WIFI_PCIE_WIFI7
    		probe unprovisioned
    	end
diff --git a/src/mainboard/google/brya/variants/rull/variant.c b/src/mainboard/google/brya/variants/rull/variant.c
index a2fffb4..1f51c09 100644
--- a/src/mainboard/google/brya/variants/rull/variant.c
+++ b/src/mainboard/google/brya/variants/rull/variant.c
@@ -16,29 +16,12 @@
    return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI));
 }

-static const struct pad_config wifi_pcie_enable_pad[] = {
-	/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
-	PAD_CFG_GPO(GPP_H20, 1, DEEP),
-	/* B11 : NC ==> EN_PP3300_WLAN_X*/
-	PAD_CFG_GPO(GPP_B11, 1, DEEP),
-};
-
 void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 {
-	if (!fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_WIFI6E)) || fw_config_is_provisioned()) {
-		printk(BIOS_INFO, "CNVi bluetooth disabled by fw_config\n");
-		config->cnvi_bt_core = false;
-		printk(BIOS_INFO, "CNVi bluetooth audio offload disabled by fw_config\n");
-		config->cnvi_bt_audio_offload = false;
-	}
-}
-
-void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
-{
    if (fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_WIFI6E)) || !fw_config_is_provisioned()) {
-		printk(BIOS_INFO, "Enable PCie based Wifi GPIO pins.\n");
-		gpio_padbased_override(padbased_table, wifi_pcie_enable_pad,
-				       ARRAY_SIZE(wifi_pcie_enable_pad));
+		printk(BIOS_INFO, "CNVi bluetooth enabled by fw_config\n");
+		config->cnvi_bt_core = true;
+		config->cnvi_bt_audio_offload = true;
    }
 }