[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT

[Brandon Breitenstein (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Caveh Jalali, Paul Menzel, Nick Vaccaro, Tim Wawrzynczak, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38737

to look at the new patch set (#6).

Change subject: soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT
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soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT

FSP needs to know to allow the root ports for USB4/TBT to be enabled
This patch may need additional checks for each board as it might not
be the right thing to turn them all on for every Tiger Lake board.

BUG=b:141609883
BRANCH=NONE
TEST=Built image and verified that the root ports were visible with lspci

Change-Id: I3f020e20fa8e9fd1ac69d883f4dc1fcbb330a3bf
Signed-off-by: Brandon Breitenstein 
---
M src/soc/intel/tigerlake/fsp_params_tgl.c
M src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
2 files changed, 32 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/38737/6