3 Feb
2020
3 Feb
'20
5:24 p.m.
Ravi kumar has uploaded a new patch set (#7) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/38542 )
Change subject: sc7180: QSIP SPI NOR addressing mode ......................................................................
sc7180: QSIP SPI NOR addressing mode
Putting SPI NOR 3 byte addressing mode as it is not supporting 4 byte addressing mode.
Change-Id: I232dde9387f0c83dd1578f3cbab4ab85a711349d Signed-off-by: Veerabhadrarao Badiganti vbadigan@codeaurora.org Signed-off-by: Shaik Sajida Bhanu sbhanu@codeaurora.org --- M src/drivers/spi/spi_flash.c 1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/38542/7
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I232dde9387f0c83dd1578f3cbab4ab85a711349d
Gerrit-Change-Number: 38542
Gerrit-PatchSet: 7
Gerrit-Owner: mturney mturney mturney@codeaurora.org
Gerrit-Reviewer: Ravi kumar rbokka@codeaurora.org
Gerrit-Reviewer: Sajida Bhanu sbhanu@codeaurora.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Aaron Durbin adurbin@chromium.org
Gerrit-CC: Julius Werner jwerner@chromium.org
Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-MessageType: newpatchset