[coreboot-gerrit] Patch merged into coreboot/master: b50566e baytrail: Fix _CRS to build with new IASL

the following patch was just integrated into master:
commit b50566ef63b560ed149db6aeb19004d7c0345275
Author: Duncan Laurie 
Date:   Wed Dec 4 18:34:11 2013 -0800

baytrail: Fix _CRS to build with new IASL

The new IASL is complaining about the PCI memory region not
    having consistent base/end/length values because they are
    placeholder that are fixed up in the method before returning.

Put in some more valid placeholder values to make it happy.

BUG=chromium:311294
    BRANCH=none
    TEST=build and boot with IASL 20130117 on rambi

Change-Id: I0e21adcce43deb14d3c2c45787ff8c9efc357c2f
    Signed-off-by: Duncan Laurie 
    Reviewed-on: https://chromium-review.googlesource.com/178864
    Reviewed-by: Aaron Durbin 
    Commit-Queue: Duncan Laurie 
    Signed-off-by: Aaron Durbin 
    Reviewed-on: http://review.coreboot.org/4988
    Reviewed-by: Kyösti Mälkki 
    Tested-by: build bot (Jenkins)

See http://review.coreboot.org/4988 for details.

-gerrit