Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37203 )
Change subject: AGESA,binaryPI: Remove early_all_cores() ......................................................................
AGESA,binaryPI: Remove early_all_cores()
This was implemented to make sure it gets called before attempting any PCI MMIO access. Now that we have one central romstage_main() implementation this extra precaution is no longer useful.
Change-Id: I09b24da827e00d7a9ba0a51d5eef36f174b893a6 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/drivers/amd/agesa/cache_as_ram.S M src/drivers/amd/agesa/romstage.c 2 files changed, 3 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/37203/1
diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 3f1358a..e3e5735 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -94,8 +94,6 @@
#endif
- call early_all_cores - /* Must maintain 16-byte stack alignment here. */ pushl $0x0 pushl $0x0 diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 72aac3e..0ecfeb2 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -27,15 +27,6 @@ #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/state_machine.h>
-#if !CONFIG(POSTCAR_STAGE) -#error "Only POSTCAR_STAGE is supported." -#endif - -void asmlinkage early_all_cores(void) -{ - amd_initmmio(); -} - void __weak platform_once(struct sysinfo *cb) { board_BeforeAgesa(cb); @@ -57,6 +48,9 @@ u8 initial_apic_id = (u8) (cpuid_ebx(1) >> 24); int cbmem_initted = 0;
+ /* Enable PCI MMIO configuration. */ + amd_initmmio(); + fill_sysinfo(cb);
if ((initial_apic_id == 0) && boot_cpu()) {