[coreboot-gerrit] Change in coreboot[master]: cpu/x86/smm: SMM module loader version 2

[Rocky Phagura (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Furquan Shaikh, Martin Roth, Patrick Rudolph, Jonathan Zhang, Eugene Myers, Stefan Reinauer, David Hendricks, Angel Pons, Aaron Durbin, Eugene Myers,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43684

to look at the new patch set (#3).

Change subject: cpu/x86/smm: SMM module loader version 2
......................................................................

cpu/x86/smm: SMM module loader version 2

Xeon-SP a Skylake Scalable Processor can have 36 CPU threads(18 cores). Current
coreboot SMM is unable to handle more than ~32 CPU threads. This patch
introduces a version 2 of the SMM module loader which addresses this problem.
Having two versions of the SMM module loader prevents any issues to current
projects. Future Xeon-SP products will be using this version of the SMM
loader.  Subsequent patches will enable board specifc functionality
for Xeon-SP.

The reason for moving to version 2 is the state save area begins to encroach
upon the smi handling code when more than 32 CPU threads are in the system.
This can cause system hangs, reboots, etc. The second change is related to
staggered entry points with simple near jumps. In the current loader, near
jumps will not work because the CPU is jumping within the same code segment. In
version 2, "far" address jumps are necessary therefore protected mode must
is enabled first. The SMM layout and how the CPUs are staggered are documented
in the code.

By making the modifications above, this allows the smm module loader to expand
easily as more CPU threads are added.

TEST=build for Tiogapass platform under OCP mainboard. Enable the following in
Kconfig.
        select CPU_INTEL_COMMON_SMM
        select SOC_INTEL_COMMON_BLOCK_SMM
        select SMM_TSEG
        select HAVE_SMI_HANDLER
        select ACPI_INTEL_HARDWARE_SLEEP_VALUES

Debug console will show all 36 cores relocated. Further tested by generating
SMI's to port 0xb2 using XDP/ITP HW debugger and ensured all cores entering
and exiting SMM properly. In addition, booted to Linux 5.4 kernel and observed
no issues during mp init.

Change-Id: I00a23a5f2a46110536c344254868390dbb71854c
Signed-off-by: Rocky Phagura 
---
M src/cpu/x86/Kconfig
M src/cpu/x86/smm/Makefile.inc
A src/cpu/x86/smm/smm_module_loaderv2.c
M src/include/cpu/x86/smm.h
4 files changed, 684 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/43684/3