Hello Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37693
to look at the new patch set (#2).
Change subject: mb/google/drallion: Enable/disable GPIO clock gating ......................................................................
mb/google/drallion: Enable/disable GPIO clock gating
Before the system enters S0ix/S3, each GPIO community will have its dynamic clock gating turned on. Upon return to S0, the dynamic clock gating will be turned back off.
BUG=b:144002424 TEST=measure power consumption by HW.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I3b6e91d04bea6ac0c9bfc6b4cd67abb25cba13d9 --- M src/mainboard/google/drallion/variants/drallion/include/variant/acpi/mainboard.asl 1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/37693/2