Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46053 )
Change subject: soc/intel/alderlake/ramstage: Fix compilation issue ......................................................................
soc/intel/alderlake/ramstage: Fix compilation issue
Refer to commit 0359d9d (soc/intel: Make use of PMC low power program from common block) commit 1366e44 (soc/intel: Move pch_enable_ioapic() to common code) commit 78463a7 (soc/intel: Move soc_pch_pirq_init() to common code) commit 8971ccd (soc/intel: Move pch_misc_init() to common code) for details
Change-Id: Ic83d332cf2bfe8eded1667dd1503e718d854f10b Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/alderlake/espi.c M src/soc/intel/alderlake/include/soc/pmc.h 2 files changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/46053/1
diff --git a/src/soc/intel/alderlake/espi.c b/src/soc/intel/alderlake/espi.c index 8a4007c..c909030 100644 --- a/src/soc/intel/alderlake/espi.c +++ b/src/soc/intel/alderlake/espi.c @@ -59,7 +59,7 @@ { /* Legacy initialization */ isa_dma_init(); - lpc_pch_misc_init(); + pch_misc_init();
/* Enable CLKRUN_EN for power gating ESPI */ lpc_enable_pci_clk_cntl(); @@ -71,8 +71,8 @@ lpc_set_serirq_mode(SERIRQ_QUIET);
/* Interrupt configuration */ - lpc_pch_enable_ioapic(); - lpc_pch_pirq_init(); + pch_enable_ioapic(); + pch_pirq_init(); setup_i8259(); i8259_configure_irq_trigger(9, 1); } diff --git a/src/soc/intel/alderlake/include/soc/pmc.h b/src/soc/intel/alderlake/include/soc/pmc.h index e4e3dfb..8887d9b 100644 --- a/src/soc/intel/alderlake/include/soc/pmc.h +++ b/src/soc/intel/alderlake/include/soc/pmc.h @@ -125,6 +125,7 @@ enum pch_pmc_xtal pmc_get_xtal_freq(void);
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC +#define ACPI_TIM_DIS (1 << 1) #define GPIO_GPE_CFG 0x1920 #define GPE0_DWX_MASK 0xf #define GPE0_DW_SHIFT(x) (4*(x))