[coreboot-gerrit] Change in coreboot[master]: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45813 )

Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration
......................................................................

soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration

This prototype will be used outside of soc/amd.

Change-Id: Icc69cf8a910764b27edf64f0f527b8f6a9013121
Signed-off-by: Arthur Heymans 
---
M src/include/cpu/x86/smm.h
M src/soc/amd/picasso/include/soc/smi.h
M src/soc/amd/picasso/smi_util.c
M src/soc/amd/stoneyridge/include/soc/smi.h
M src/soc/amd/stoneyridge/smi_util.c
5 files changed, 5 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45813/1

diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 1073d03..6cf6f82 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -197,5 +197,8 @@
 /* Return the SMM save state revision. The revision can be fetched from the smm savestate
    which is always at the same offset downward from the top of the save state. */
 uint32_t smm_revision(void);
+/* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2).
+   On AMD systems it is sometimes configurable. */
+uint16_t pm_acpi_smi_cmd_port(void);

#endif /* CPU_X86_SMM_H */
diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h
index a629fc5..ee47676 100644
--- a/src/soc/amd/picasso/include/soc/smi.h
+++ b/src/soc/amd/picasso/include/soc/smi.h
@@ -213,7 +213,6 @@
    uint8_t level;		/* Edge or Level,  smi_sci_dir */
 };

-uint16_t pm_acpi_smi_cmd_port(void);
 void configure_smi(uint8_t smi_num, uint8_t mode);
 void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
 void configure_scimap(const struct sci_source *sci);
diff --git a/src/soc/amd/picasso/smi_util.c b/src/soc/amd/picasso/smi_util.c
index 2c5085b..2fbc8e2 100644
--- a/src/soc/amd/picasso/smi_util.c
+++ b/src/soc/amd/picasso/smi_util.c
@@ -5,6 +5,7 @@
  */

#include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <soc/southbridge.h>
 #include <soc/smi.h>
 #include <amdblocks/acpimmio.h>
diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h
index f7cacea..15bba0f 100644
--- a/src/soc/amd/stoneyridge/include/soc/smi.h
+++ b/src/soc/amd/stoneyridge/include/soc/smi.h
@@ -211,7 +211,6 @@
    uint8_t level;		/* Edge or Level,  smi_sci_dir */
 };

-uint16_t pm_acpi_smi_cmd_port(void);
 void configure_smi(uint8_t smi_num, uint8_t mode);
 void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
 void configure_scimap(const struct sci_source *sci);
diff --git a/src/soc/amd/stoneyridge/smi_util.c b/src/soc/amd/stoneyridge/smi_util.c
index 2c5085b..2fbc8e2 100644
--- a/src/soc/amd/stoneyridge/smi_util.c
+++ b/src/soc/amd/stoneyridge/smi_util.c
@@ -5,6 +5,7 @@
  */

#include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <soc/southbridge.h>
 #include <soc/smi.h>
 #include <amdblocks/acpimmio.h>