Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37324 )
Change subject: soc/amd/common: Access ACPIMMIO via proper symbols ......................................................................
Patch Set 13:
(2 comments)
https://review.coreboot.org/c/coreboot/+/37324/13/src/soc/amd/common/block/i... File src/soc/amd/common/block/include/amdblocks/acpimmio_map.h:
https://review.coreboot.org/c/coreboot/+/37324/13/src/soc/amd/common/block/i... PS13, Line 99: ASL fails on additions
What fails specifically?
Last time I tried, this:
(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_MISC_BANK)
CPP will not do that sum before iasl.
https://review.coreboot.org/c/coreboot/+/37324/13/src/soc/amd/common/block/i... PS13, Line 117: ACPIMMIO_WDT_BANK
Huh? How are these not base addresses? They're not PCI bars, sure, but they are absolutely base add […]
In my vision, these terms relate to how hardware is built.
Something _BASE_ needs to include the most-significant-bit as it used to generate a 'device select' signal when decoding memory transactions from the bus. As for _OFFSET_ my mind expands that implicitly to 'register offset', something that would contain the least-significant-bit and it steps in adjacent memory locations. Common terms for the in-between parts would be _PAGE_ or _BANK_. I associate former with memory and latter more to MMIO where different banks provide different functionality.
Resolve or find an agreement. I don't plan to change this.