[coreboot-gerrit] Change in coreboot[master]: soc/sifive/fu540: Document #if ENV_ROMSTAGE line

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28699

Change subject: soc/sifive/fu540: Document #if ENV_ROMSTAGE line
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soc/sifive/fu540: Document #if ENV_ROMSTAGE line

Change-Id: Idcd72c558e46637b1b99e9613963436fedd4a8b9
Signed-off-by: Jonathan Neuschäfer 
---
M src/soc/sifive/fu540/clock.c
1 file changed, 2 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/28699/1

diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c
index eb7a8b5..20dce23 100644
--- a/src/soc/sifive/fu540/clock.c
+++ b/src/soc/sifive/fu540/clock.c
@@ -121,8 +121,8 @@
 // 33.33 Mhz after reset
 #define FU540_BASE_FQY 33330

+/* Clock initialization should only be done in romstage. */
 #if ENV_ROMSTAGE
-
 static void init_coreclk(void)
 {
    // switch coreclk to input reference frequency before modifying PLL
@@ -240,8 +240,7 @@
    for (int i = 0; i < 256; i++)
    	asm volatile ("nop");
 }
-
-#endif
+#endif /* ENV_ROMSTAGE */

int clock_get_coreclk_khz(void)
 {