Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33987
Change subject: soc/amd/picasso: Add xhci1 and remove ehci ......................................................................
soc/amd/picasso: Add xhci1 and remove ehci
Change-Id: I9d0098082c224bbf5ab2b4f0f41eb8b5b729eec7 Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/picasso/chip.c M src/soc/amd/picasso/include/soc/pci_devs.h M src/soc/amd/picasso/include/soc/southbridge.h M src/soc/amd/picasso/usb.c 4 files changed, 25 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33987/1
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index 19921e1..dad9d22 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -96,8 +96,6 @@ return "PBR8"; case HDA1_DEVFN: return "AZHD"; - case EHCI1_DEVFN: - return "EHC0"; case LPC_DEVFN: return "LPCB"; case SATA_DEVFN: @@ -106,8 +104,10 @@ return "SDCN"; case SMBUS_DEVFN: return "SBUS"; - case XHCI_DEVFN: + case XHCI0_DEVFN: return "XHC0"; + case XHCI1_DEVFN: + return "XHC1"; default: return NULL; } diff --git a/src/soc/amd/picasso/include/soc/pci_devs.h b/src/soc/amd/picasso/include/soc/pci_devs.h index 478a2cb..c823fdb 100644 --- a/src/soc/amd/picasso/include/soc/pci_devs.h +++ b/src/soc/amd/picasso/include/soc/pci_devs.h @@ -151,12 +151,19 @@ #define NB_DEVFN PCI_DEVFN(NB_DEV, NB_FUNC) #define SOC_NB_DEV _SOC_DEV(NB_DEV, NB_FUNC)
-/* XHCI */ -#define XHCI_DEV 0x10 -#define XHCI_FUNC 0 -#define XHCI_DEVID 0x7914 -#define XHCI_DEVFN PCI_DEVFN(XHCI_DEV, XHCI_FUNC) -#define SOC_XHCI_DEV _SOC_DEV(XHCI_DEV, XHCI_FUNC) +/* USB 3.1 */ +#define XHCI0_DEV 0x0 +#define XHCI0_FUNC 3 +#define XHCI0_DEVID 0x15e0 +#define XHCI0_DEVFN PCI_DEVFN(XHCI0_DEV, XHCI0_FUNC) +#define SOC_XHCI0_DEV _SOC_DEV(XHCI0_DEV, XHCI0_FUNC) + +/* USB 3.1 */ +#define XHCI1_DEV 0x0 +#define XHCI1_FUNC 4 +#define XHCI1_DEVID 0x15e1 +#define XHCI1_DEVFN PCI_DEVFN(XHCI1_DEV, XHCI1_FUNC) +#define SOC_XHCI1_DEV _SOC_DEV(XHCI1_DEV, XHCI1_FUNC)
/* SATA */ #define SATA_DEV 0x11 @@ -167,13 +174,6 @@ #define SATA_DEVFN PCI_DEVFN(SATA_DEV, SATA_FUNC) #define SOC_SATA_DEV _SOC_DEV(SATA_DEV, SATA_FUNC)
-/* EHCI */ -#define EHCI_DEV 0x12 -#define EHCI_FUNC 0 -#define EHCI_DEVID 0x7908 -#define EHCI1_DEVFN PCI_DEVFN(EHCI_DEV, EHCI_FUNC) -#define SOC_EHCI1_DEV _SOC_DEV(EHCI_DEV, EHCI_FUNC) - /* SMBUS */ #define SMBUS_DEV 0x14 #define SMBUS_FUNC 0 diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index a5892bb..4392e4f 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -367,8 +367,8 @@ * over current support. */ #define USB_OC_DISABLE_ALL 0xffff -int mainboard_get_xhci_oc_map(uint16_t *usb_oc_map); -int mainboard_get_ehci_oc_map(uint16_t *usb_oc_map); +int mainboard_get_xhci0_oc_map(uint16_t *usb_oc_map); +int mainboard_get_xhci1_oc_map(uint16_t *usb_oc_map);
/* Initialize all the i2c buses that are marked with early init. */ void i2c_soc_early_init(void); diff --git a/src/soc/amd/picasso/usb.c b/src/soc/amd/picasso/usb.c index ae6c476..66c8266 100644 --- a/src/soc/amd/picasso/usb.c +++ b/src/soc/amd/picasso/usb.c @@ -28,23 +28,24 @@ { uint16_t map = USB_OC_DISABLE_ALL;
- if (dev->path.pci.devfn == XHCI_DEVFN) { - if (mainboard_get_xhci_oc_map(&map) == 0) + if (dev->path.pci.devfn == XHCI0_DEVFN) { + if (mainboard_get_xhci0_oc_map(&map) == 0) ; // TODO }
- if (dev->path.pci.devfn == EHCI1_DEVFN) - if (mainboard_get_ehci_oc_map(&map) == 0) + if (dev->path.pci.devfn == XHCI1_DEVFN) { + if (mainboard_get_xhci1_oc_map(&map) == 0) ; // TODO + } }
-int __weak mainboard_get_xhci_oc_map(uint16_t *map) +int __weak mainboard_get_xhci0_oc_map(uint16_t *map) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); return -1; }
-int __weak mainboard_get_ehci_oc_map(uint16_t *map) +int __weak mainboard_get_xhci1_oc_map(uint16_t *map) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); return -1;