[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/cse: Add function to perform CSE lock configuration

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Werner Zeh, Patrick Rudolph.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61520 )

Change subject: soc/intel/common/cse: Add function to perform CSE lock configuration
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Patch Set 6:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/61520/comment/9ebe0498_8915ba0b 
PS6, Line 1018: (cse_is_hfs1_com_normal() || cse_is_hfs1_com_soft_temp_disable())
> > +1 to what Tim mentioned here. […]

The recommendation in the same paragraph is,

GLOBAL RESET command must be issued if CSE is not in error state and accepts the command (not sent EOP already). This is to avoid the described issue in the guide.
But only if CSE is in error state & not in a state to accept the GLOBAL RESET command, then global reset should be triggered by setting the registers as described in the guide. Are you referring to something else?