[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: pmclib: make use of the new ETR address API

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36570 )

Change subject: soc/intel/common: pmclib: make use of the new ETR address API
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Patch Set 9:
> Patch Set 9: Code-Review-1
>
> I must say I do not like to see pci_config_write32() getting repiaced with write32(). But looks like Aaron did not mind it?

It's a tradeoff on where to put complication. Within this one compilation unit or do the binding in the soc code itself. Yes, in this case we needed the current address of the config register to achieve that. In SoC for skl in this use-case we know mmcfg is employed and that code is the best place to make that decision.

Alternatively we put all the complexity in the compilation unit to handle the various cases where the register resides. It requires binding into #defines located in SoC #include files as well as all the conditionals in handling the alternative accesses.

Do you have alternatives?