Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33759 )
Change subject: soc/amd/picasso: Create a hybrid romstage to begin in DRAM ......................................................................
Patch Set 7:
(4 comments)
https://review.coreboot.org/c/coreboot/+/33759/5/src/soc/amd/picasso/Kconfig File src/soc/amd/picasso/Kconfig:
https://review.coreboot.org/c/coreboot/+/33759/5/src/soc/amd/picasso/Kconfig... PS5, Line 88: uncompressed size of romstage.
Fix comment. I see no reason why these two should be visible options.
Done
https://review.coreboot.org/c/coreboot/+/33759/5/src/soc/amd/picasso/Kconfig... PS5, Line 99: and not usable by the OS.
Yes it is. […]
Done
https://review.coreboot.org/c/coreboot/+/33759/5/src/soc/amd/picasso/reset_v... File src/soc/amd/picasso/reset_vector.S:
https://review.coreboot.org/c/coreboot/+/33759/5/src/soc/amd/picasso/reset_v... PS5, Line 145: and $0xfffffff0, %esp
I remembered it wrong from 2 years ago. […]
Done
https://review.coreboot.org/c/coreboot/+/33759/5/src/soc/amd/picasso/reset_v... PS5, Line 165: _start:
I'm uncertain too. However in arch/x86/assembly_entry. […]
I'm going to resolve this. Looking at bootblock.elf in an older design: .text 00000000 _start16bit .reset 00000000 _start
That seems consistent with what I have here, where _start is in ".reset".