30 Dec
2019
30 Dec
'19
3:52 p.m.
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37948 )
Change subject: mb/google/puff: [WIP] Add power sequencing for LSPCON ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37948/3/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/ramstage.c:
https://review.coreboot.org/c/coreboot/+/37948/3/src/mainboard/google/hatch/... PS3, Line 35: firmware to initialize
Yes, the LSPCON Firmware. […]
OK, make that explicit that you mean LSPCON fw. What about early_gpio tables and setting it to be low first then high later?
--
To view, visit https://review.coreboot.org/c/coreboot/+/37948
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I336d8b72fcd44a0d03ee7f277eb5e838e4005804
Gerrit-Change-Number: 37948
Gerrit-PatchSet: 5
Gerrit-Owner: Rizwan Qureshi rizwan.qureshi@intel.com
Gerrit-Reviewer: Edward O'Callaghan quasisec@chromium.org
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Kangheui Won khwon@chromium.org
Gerrit-Reviewer: Martin Roth martinroth@google.com
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Rizwan Qureshi rizwan.qureshi@intel.com
Gerrit-Reviewer: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Usha P usha.p@intel.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Mon, 30 Dec 2019 14:52:56 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Edward O'Callaghan quasisec@chromium.org
Comment-In-Reply-To: Rizwan Qureshi rizwan.qureshi@intel.com
Gerrit-MessageType: comment