[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Furquan Shaikh, Martin Roth, Marshall Dawson, Karthik Ramasubramanian, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55987 )

Change subject: soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads
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Patch Set 3:

(1 comment)

File src/soc/amd/common/block/cpu/update_microcode.c:

https://review.coreboot.org/c/coreboot/+/55987/comment/6fd4e6e4_abd7fd4f 
PS2, Line 83: MPB_MAX_SIZE
> Reading rest of the code again, could it be the case that there are multiple microcode files added t […]

Ah you are right. I forgot about the list. Done.