Hello Julius Werner, Weiyi Lu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37136
to look at the new patch set (#2).
Change subject: mediatek/mt8183: disable BBLPM of DCXO core ......................................................................
mediatek/mt8183: disable BBLPM of DCXO core
When we only enable XO_SOC and mask most BBLPM requests, the BBLPM HW arbiter will have DCXO core to enter Baseband Low-Power Mode(BBLPM). Under BBLPM mode, inaccurate(about 1.5KHz offset) 26MHz clocks from crystal is provided and crystal voltage will drop from 1.8V to 0.7V or lower. In order to ensure the stability by always outputting an accuarate system clock when system is running. We should disable BBLPM when only XO_SOC enabled.
BRANCH=kukui TEST=accurate 26MHz provided and correct crystal voltage swing
Change-Id: Iea72a964507a19735cf92e3774cd8a94c06545b2 Signed-off-by: Weiyi Lu weiyi.lu@mediatek.com --- M src/soc/mediatek/mt8183/rtc.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/37136/2