[coreboot-gerrit] Change in coreboot[master]: mb/google/zork/berknip: Increase eMMC initial clock frequency

[Rob Barnes (Code Review)]

Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45931 )

Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency
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mb/google/zork/berknip: Increase eMMC initial clock frequency

This will reduce boot time by 7ms. Some of the initial designs
don't have a pull-up resistor on the CMD line. These designs still boot
at 400 kHz despite not having the pull-up.

BUG=b:158766134
TEST=Boot Berknip w/ eMMC to OS.

Change-Id: I5d55f55b8208b4dc3fbdc9d1ec6333f9e211e3fd
Signed-off-by: Rob Barnes 
---
M src/mainboard/google/zork/variants/berknip/overridetree.cb
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/45931/1

diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb
index 9562939..674d557 100644
--- a/src/mainboard/google/zork/variants/berknip/overridetree.cb
+++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb
@@ -38,6 +38,12 @@
    	.early_init = true,
    }"

+	register "emmc_config" = "{
+		.timing = SD_EMMC_EMMC_HS400,
+		.sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A,
+		.init_khz_preset = 400,
+	}"
+
    # See AMD 55570-B1 Table 13: PCI Device ID Assignments.
    device domain 0 on
    	subsystemid 0x1022 0x1510 inherit