[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40004 )

Change subject: soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type
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soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type

TCSS TBT PCIE root ports scope type was mistakenly set to PCI_ENDPOINT.
Fix the scope type to be PCI_SUB.

BUG=b:141609884
TEST=Booted to kernel and verified no TBT PCIE root ports scope
type mismatch error in kernel log.

Change-Id: I844e7e9583992be496223fb51f24c5aa24fc7d21
Signed-off-by: John Zhao 
---
M src/soc/intel/tigerlake/acpi.c
1 file changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/40004/1

diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c
index 23fd970..7cd0102 100644
--- a/src/soc/intel/tigerlake/acpi.c
+++ b/src/soc/intel/tigerlake/acpi.c
@@ -1,6 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
+ * Copyright (C) 2019-2020 Intel Corp.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -246,7 +247,7 @@
    		unsigned long tmp = current;

current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
-			current += acpi_create_dmar_ds_pci(current, 0, 7, i);
+			current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);

acpi_dmar_drhd_fixup(tmp, current);
    	}