Ronald G. Minnich (rminnich@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5354
-gerrit
commit 218cab705b506a925a304ea40a5d7b53c5ccfd59 Author: Ronald G. Minnich rminnich@gmail.com Date: Sat Mar 8 17:33:12 2014 +0100
Enable pages. Tested and working on QEMU.
Enable page tables in coreboot. We're going to have to do this at some point, when we hit x86_64; the ARM ports do paging in both 32- and 64-bit modes; MTRR is a PITA; and it's easy. The non-paging architectures are outnumbered by the paging architectures!
This trial example just sets up a 4G identity map using 4M pages. It works for QEMU just fine to boot tinycore linux. The next step is to map the low 4M much more finely, with 4K pages, so we can catch NULL pointers. This will require reworking VGA bios support, which uses page 0.
For SMP, we'll need to add code to let them also load page tables, but one thing at a time.
Next I'll add code to support page table manipulation. With luck, we can stop using the MTRRs with all their pain and suffering. For now we use this for machines where coreboot can live in the low 4G. For other cases, it's time to start thinking about 64-bit mode; since entering Long Mode requires page tables, we need to figure it out. The ARM V8 port is carving the way so this is as good a time as any.
This code is enabled by CONFIG_PGE, which defaults to n. To turn it on navigate to architecture options in menuconfig.
A remaining question is whether to turn off paging when we start the payload. For now, we turn it off.
Change-Id: Iea0192e5187c47e63d25f88eaa3e88cb6c58feb1 Signed-off-by: Ronald G. Minnich rminnich@gmail.com --- src/arch/x86/Kconfig | 11 ++++ src/arch/x86/boot/boot.c | 17 ++++++ src/arch/x86/lib/c_start.S | 23 ++++++++ src/arch/x86/lib/makepg.c | 11 ++++ src/arch/x86/lib/pagetables.S | 132 ++++++++++++++++++++++++++++++++++++++++++ src/include/bootstate.h | 2 +- src/lib/cbfs.c | 5 ++ 7 files changed, 200 insertions(+), 1 deletion(-)
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8854e6b..0c0f91c 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -78,6 +78,17 @@ config UPDATE_IMAGE is a suitable file for further processing. The bootblock will not be modified.
+config PGE + bool "Enable x86 page tables." + default n + help + In original coreboot we did not use page tables. The + MTRR code just keeps getting messier and if we turn + on paging it gets very easy. We can enable disable + caching on anything down to a 4k boundary. We can + control cache disable and write-back/writethrough + on each page. For now, this code creates an identity + map for 4G using 4M pages. config ROMCC bool default n diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 29070a0..253d2d9 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -11,6 +11,12 @@ static void jmp_payload_no_bounce_buffer(void *entry) /* Jump to kernel */ __asm__ __volatile__( " cld \n\t" + /* Paging might have been on. We need to turn it off + * right before we jump + */ + " movl %%cr0, %%eax\n\t" + " andl $0x7fffffff, %%eax\n\t" + " movl %%edx, %%cr0\n\t" /* Now jump to the loaded image */ " call *%0\n\t"
@@ -73,6 +79,16 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) " jmp *%%eax\n\t" "1: \n\t"
+ /* Paging might have been on. It's ok, + * the bounce buffer runs at same VA and PA. + * So we can turn paging off now. + */ + " movl %%cr0, %%eax\n\t" + " andl $0x7fffffff, %%eax\n\t" + " movl %%eax, %%cr0\n\t" + " jmp 1f\n\t" + "1:\n\t" + /* Copy the coreboot bounce buffer over coreboot */ /* Move ``longs'' the coreboot size is 4 byte aligned */ " movl 16(%%esp), %%edi\n\t" @@ -85,6 +101,7 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) " movl %5, %%eax\n\t" " movl 0(%%esp), %%ebx\n\t" " call *4(%%esp)\n\t" + "1: jmp 1b\n\t"
/* The loaded image returned? */ " cli \n\t" diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S index 01ffa7c..1514386 100644 --- a/src/arch/x86/lib/c_start.S +++ b/src/arch/x86/lib/c_start.S @@ -1,4 +1,5 @@ #include <cpu/x86/post_code.h> +#include <cpu/x86/cr.h>
/* Place the stack in the bss section. It's not necessary to define it in the * the linker script. */ @@ -31,6 +32,28 @@ _start: movl %eax, %gs
post_code(POST_ENTRY_C_START) /* post 13 */ + jmp code +#if CONFIG_PGE==1 + +#include "pagetables.S" + +code: + movl $pagetables, %ecx /* load address of page directory */ + movl %ecx, %cr3 + jmp 1f +1: + movl %cr4, %edx + orl $CR4_PSE, %edx /* 4m pages */ + movl %edx, %cr4 + + movl %cr0, %edx + orl $CR0_PG, %edx + + movl $paging, %eax + movl %edx, %cr0 + jmp *%eax +paging: +#endif
cld
diff --git a/src/arch/x86/lib/makepg.c b/src/arch/x86/lib/makepg.c new file mode 100644 index 0000000..fb601f1 --- /dev/null +++ b/src/arch/x86/lib/makepg.c @@ -0,0 +1,11 @@ +#include <stdio.h> +main(int argc, char *argv[]) +{ + int i, j; + for(i = 0; i < 1024; i += 8){ + printf("\t.long "); + for(j = 0; j < 8; j++) + printf("0x%08x,", ((i+j)<<22) + 0x85); + printf("\n"); + } +} diff --git a/src/arch/x86/lib/pagetables.S b/src/arch/x86/lib/pagetables.S new file mode 100644 index 0000000..1dcb6d8 --- /dev/null +++ b/src/arch/x86/lib/pagetables.S @@ -0,0 +1,132 @@ +/* bugs in gas? We seem to need this int else it does no align pagetables! */ + .int 0 + .align 4096 +pagetables: + .long 0x00000085,0x00400085,0x00800085,0x00c00085,0x01000085,0x01400085,0x01800085,0x01c00085 + .long 0x02000085,0x02400085,0x02800085,0x02c00085,0x03000085,0x03400085,0x03800085,0x03c00085 + .long 0x04000085,0x04400085,0x04800085,0x04c00085,0x05000085,0x05400085,0x05800085,0x05c00085 + .long 0x06000085,0x06400085,0x06800085,0x06c00085,0x07000085,0x07400085,0x07800085,0x07c00085 + .long 0x08000085,0x08400085,0x08800085,0x08c00085,0x09000085,0x09400085,0x09800085,0x09c00085 + .long 0x0a000085,0x0a400085,0x0a800085,0x0ac00085,0x0b000085,0x0b400085,0x0b800085,0x0bc00085 + .long 0x0c000085,0x0c400085,0x0c800085,0x0cc00085,0x0d000085,0x0d400085,0x0d800085,0x0dc00085 + .long 0x0e000085,0x0e400085,0x0e800085,0x0ec00085,0x0f000085,0x0f400085,0x0f800085,0x0fc00085 + .long 0x10000085,0x10400085,0x10800085,0x10c00085,0x11000085,0x11400085,0x11800085,0x11c00085 + .long 0x12000085,0x12400085,0x12800085,0x12c00085,0x13000085,0x13400085,0x13800085,0x13c00085 + .long 0x14000085,0x14400085,0x14800085,0x14c00085,0x15000085,0x15400085,0x15800085,0x15c00085 + .long 0x16000085,0x16400085,0x16800085,0x16c00085,0x17000085,0x17400085,0x17800085,0x17c00085 + .long 0x18000085,0x18400085,0x18800085,0x18c00085,0x19000085,0x19400085,0x19800085,0x19c00085 + .long 0x1a000085,0x1a400085,0x1a800085,0x1ac00085,0x1b000085,0x1b400085,0x1b800085,0x1bc00085 + .long 0x1c000085,0x1c400085,0x1c800085,0x1cc00085,0x1d000085,0x1d400085,0x1d800085,0x1dc00085 + .long 0x1e000085,0x1e400085,0x1e800085,0x1ec00085,0x1f000085,0x1f400085,0x1f800085,0x1fc00085 + .long 0x20000085,0x20400085,0x20800085,0x20c00085,0x21000085,0x21400085,0x21800085,0x21c00085 + .long 0x22000085,0x22400085,0x22800085,0x22c00085,0x23000085,0x23400085,0x23800085,0x23c00085 + .long 0x24000085,0x24400085,0x24800085,0x24c00085,0x25000085,0x25400085,0x25800085,0x25c00085 + .long 0x26000085,0x26400085,0x26800085,0x26c00085,0x27000085,0x27400085,0x27800085,0x27c00085 + .long 0x28000085,0x28400085,0x28800085,0x28c00085,0x29000085,0x29400085,0x29800085,0x29c00085 + .long 0x2a000085,0x2a400085,0x2a800085,0x2ac00085,0x2b000085,0x2b400085,0x2b800085,0x2bc00085 + .long 0x2c000085,0x2c400085,0x2c800085,0x2cc00085,0x2d000085,0x2d400085,0x2d800085,0x2dc00085 + .long 0x2e000085,0x2e400085,0x2e800085,0x2ec00085,0x2f000085,0x2f400085,0x2f800085,0x2fc00085 + .long 0x30000085,0x30400085,0x30800085,0x30c00085,0x31000085,0x31400085,0x31800085,0x31c00085 + .long 0x32000085,0x32400085,0x32800085,0x32c00085,0x33000085,0x33400085,0x33800085,0x33c00085 + .long 0x34000085,0x34400085,0x34800085,0x34c00085,0x35000085,0x35400085,0x35800085,0x35c00085 + .long 0x36000085,0x36400085,0x36800085,0x36c00085,0x37000085,0x37400085,0x37800085,0x37c00085 + .long 0x38000085,0x38400085,0x38800085,0x38c00085,0x39000085,0x39400085,0x39800085,0x39c00085 + .long 0x3a000085,0x3a400085,0x3a800085,0x3ac00085,0x3b000085,0x3b400085,0x3b800085,0x3bc00085 + .long 0x3c000085,0x3c400085,0x3c800085,0x3cc00085,0x3d000085,0x3d400085,0x3d800085,0x3dc00085 + .long 0x3e000085,0x3e400085,0x3e800085,0x3ec00085,0x3f000085,0x3f400085,0x3f800085,0x3fc00085 + .long 0x40000085,0x40400085,0x40800085,0x40c00085,0x41000085,0x41400085,0x41800085,0x41c00085 + .long 0x42000085,0x42400085,0x42800085,0x42c00085,0x43000085,0x43400085,0x43800085,0x43c00085 + .long 0x44000085,0x44400085,0x44800085,0x44c00085,0x45000085,0x45400085,0x45800085,0x45c00085 + .long 0x46000085,0x46400085,0x46800085,0x46c00085,0x47000085,0x47400085,0x47800085,0x47c00085 + .long 0x48000085,0x48400085,0x48800085,0x48c00085,0x49000085,0x49400085,0x49800085,0x49c00085 + .long 0x4a000085,0x4a400085,0x4a800085,0x4ac00085,0x4b000085,0x4b400085,0x4b800085,0x4bc00085 + .long 0x4c000085,0x4c400085,0x4c800085,0x4cc00085,0x4d000085,0x4d400085,0x4d800085,0x4dc00085 + .long 0x4e000085,0x4e400085,0x4e800085,0x4ec00085,0x4f000085,0x4f400085,0x4f800085,0x4fc00085 + .long 0x50000085,0x50400085,0x50800085,0x50c00085,0x51000085,0x51400085,0x51800085,0x51c00085 + .long 0x52000085,0x52400085,0x52800085,0x52c00085,0x53000085,0x53400085,0x53800085,0x53c00085 + .long 0x54000085,0x54400085,0x54800085,0x54c00085,0x55000085,0x55400085,0x55800085,0x55c00085 + .long 0x56000085,0x56400085,0x56800085,0x56c00085,0x57000085,0x57400085,0x57800085,0x57c00085 + .long 0x58000085,0x58400085,0x58800085,0x58c00085,0x59000085,0x59400085,0x59800085,0x59c00085 + .long 0x5a000085,0x5a400085,0x5a800085,0x5ac00085,0x5b000085,0x5b400085,0x5b800085,0x5bc00085 + .long 0x5c000085,0x5c400085,0x5c800085,0x5cc00085,0x5d000085,0x5d400085,0x5d800085,0x5dc00085 + .long 0x5e000085,0x5e400085,0x5e800085,0x5ec00085,0x5f000085,0x5f400085,0x5f800085,0x5fc00085 + .long 0x60000085,0x60400085,0x60800085,0x60c00085,0x61000085,0x61400085,0x61800085,0x61c00085 + .long 0x62000085,0x62400085,0x62800085,0x62c00085,0x63000085,0x63400085,0x63800085,0x63c00085 + .long 0x64000085,0x64400085,0x64800085,0x64c00085,0x65000085,0x65400085,0x65800085,0x65c00085 + .long 0x66000085,0x66400085,0x66800085,0x66c00085,0x67000085,0x67400085,0x67800085,0x67c00085 + .long 0x68000085,0x68400085,0x68800085,0x68c00085,0x69000085,0x69400085,0x69800085,0x69c00085 + .long 0x6a000085,0x6a400085,0x6a800085,0x6ac00085,0x6b000085,0x6b400085,0x6b800085,0x6bc00085 + .long 0x6c000085,0x6c400085,0x6c800085,0x6cc00085,0x6d000085,0x6d400085,0x6d800085,0x6dc00085 + .long 0x6e000085,0x6e400085,0x6e800085,0x6ec00085,0x6f000085,0x6f400085,0x6f800085,0x6fc00085 + .long 0x70000085,0x70400085,0x70800085,0x70c00085,0x71000085,0x71400085,0x71800085,0x71c00085 + .long 0x72000085,0x72400085,0x72800085,0x72c00085,0x73000085,0x73400085,0x73800085,0x73c00085 + .long 0x74000085,0x74400085,0x74800085,0x74c00085,0x75000085,0x75400085,0x75800085,0x75c00085 + .long 0x76000085,0x76400085,0x76800085,0x76c00085,0x77000085,0x77400085,0x77800085,0x77c00085 + .long 0x78000085,0x78400085,0x78800085,0x78c00085,0x79000085,0x79400085,0x79800085,0x79c00085 + .long 0x7a000085,0x7a400085,0x7a800085,0x7ac00085,0x7b000085,0x7b400085,0x7b800085,0x7bc00085 + .long 0x7c000085,0x7c400085,0x7c800085,0x7cc00085,0x7d000085,0x7d400085,0x7d800085,0x7dc00085 + .long 0x7e000085,0x7e400085,0x7e800085,0x7ec00085,0x7f000085,0x7f400085,0x7f800085,0x7fc00085 + .long 0x80000085,0x80400085,0x80800085,0x80c00085,0x81000085,0x81400085,0x81800085,0x81c00085 + .long 0x82000085,0x82400085,0x82800085,0x82c00085,0x83000085,0x83400085,0x83800085,0x83c00085 + .long 0x84000085,0x84400085,0x84800085,0x84c00085,0x85000085,0x85400085,0x85800085,0x85c00085 + .long 0x86000085,0x86400085,0x86800085,0x86c00085,0x87000085,0x87400085,0x87800085,0x87c00085 + .long 0x88000085,0x88400085,0x88800085,0x88c00085,0x89000085,0x89400085,0x89800085,0x89c00085 + .long 0x8a000085,0x8a400085,0x8a800085,0x8ac00085,0x8b000085,0x8b400085,0x8b800085,0x8bc00085 + .long 0x8c000085,0x8c400085,0x8c800085,0x8cc00085,0x8d000085,0x8d400085,0x8d800085,0x8dc00085 + .long 0x8e000085,0x8e400085,0x8e800085,0x8ec00085,0x8f000085,0x8f400085,0x8f800085,0x8fc00085 + .long 0x90000085,0x90400085,0x90800085,0x90c00085,0x91000085,0x91400085,0x91800085,0x91c00085 + .long 0x92000085,0x92400085,0x92800085,0x92c00085,0x93000085,0x93400085,0x93800085,0x93c00085 + .long 0x94000085,0x94400085,0x94800085,0x94c00085,0x95000085,0x95400085,0x95800085,0x95c00085 + .long 0x96000085,0x96400085,0x96800085,0x96c00085,0x97000085,0x97400085,0x97800085,0x97c00085 + .long 0x98000085,0x98400085,0x98800085,0x98c00085,0x99000085,0x99400085,0x99800085,0x99c00085 + .long 0x9a000085,0x9a400085,0x9a800085,0x9ac00085,0x9b000085,0x9b400085,0x9b800085,0x9bc00085 + .long 0x9c000085,0x9c400085,0x9c800085,0x9cc00085,0x9d000085,0x9d400085,0x9d800085,0x9dc00085 + .long 0x9e000085,0x9e400085,0x9e800085,0x9ec00085,0x9f000085,0x9f400085,0x9f800085,0x9fc00085 + .long 0xa0000085,0xa0400085,0xa0800085,0xa0c00085,0xa1000085,0xa1400085,0xa1800085,0xa1c00085 + .long 0xa2000085,0xa2400085,0xa2800085,0xa2c00085,0xa3000085,0xa3400085,0xa3800085,0xa3c00085 + .long 0xa4000085,0xa4400085,0xa4800085,0xa4c00085,0xa5000085,0xa5400085,0xa5800085,0xa5c00085 + .long 0xa6000085,0xa6400085,0xa6800085,0xa6c00085,0xa7000085,0xa7400085,0xa7800085,0xa7c00085 + .long 0xa8000085,0xa8400085,0xa8800085,0xa8c00085,0xa9000085,0xa9400085,0xa9800085,0xa9c00085 + .long 0xaa000085,0xaa400085,0xaa800085,0xaac00085,0xab000085,0xab400085,0xab800085,0xabc00085 + .long 0xac000085,0xac400085,0xac800085,0xacc00085,0xad000085,0xad400085,0xad800085,0xadc00085 + .long 0xae000085,0xae400085,0xae800085,0xaec00085,0xaf000085,0xaf400085,0xaf800085,0xafc00085 + .long 0xb0000085,0xb0400085,0xb0800085,0xb0c00085,0xb1000085,0xb1400085,0xb1800085,0xb1c00085 + .long 0xb2000085,0xb2400085,0xb2800085,0xb2c00085,0xb3000085,0xb3400085,0xb3800085,0xb3c00085 + .long 0xb4000085,0xb4400085,0xb4800085,0xb4c00085,0xb5000085,0xb5400085,0xb5800085,0xb5c00085 + .long 0xb6000085,0xb6400085,0xb6800085,0xb6c00085,0xb7000085,0xb7400085,0xb7800085,0xb7c00085 + .long 0xb8000085,0xb8400085,0xb8800085,0xb8c00085,0xb9000085,0xb9400085,0xb9800085,0xb9c00085 + .long 0xba000085,0xba400085,0xba800085,0xbac00085,0xbb000085,0xbb400085,0xbb800085,0xbbc00085 + .long 0xbc000085,0xbc400085,0xbc800085,0xbcc00085,0xbd000085,0xbd400085,0xbd800085,0xbdc00085 + .long 0xbe000085,0xbe400085,0xbe800085,0xbec00085,0xbf000085,0xbf400085,0xbf800085,0xbfc00085 + .long 0xc0000085,0xc0400085,0xc0800085,0xc0c00085,0xc1000085,0xc1400085,0xc1800085,0xc1c00085 + .long 0xc2000085,0xc2400085,0xc2800085,0xc2c00085,0xc3000085,0xc3400085,0xc3800085,0xc3c00085 + .long 0xc4000085,0xc4400085,0xc4800085,0xc4c00085,0xc5000085,0xc5400085,0xc5800085,0xc5c00085 + .long 0xc6000085,0xc6400085,0xc6800085,0xc6c00085,0xc7000085,0xc7400085,0xc7800085,0xc7c00085 + .long 0xc8000085,0xc8400085,0xc8800085,0xc8c00085,0xc9000085,0xc9400085,0xc9800085,0xc9c00085 + .long 0xca000085,0xca400085,0xca800085,0xcac00085,0xcb000085,0xcb400085,0xcb800085,0xcbc00085 + .long 0xcc000085,0xcc400085,0xcc800085,0xccc00085,0xcd000085,0xcd400085,0xcd800085,0xcdc00085 + .long 0xce000085,0xce400085,0xce800085,0xcec00085,0xcf000085,0xcf400085,0xcf800085,0xcfc00085 + .long 0xd0000085,0xd0400085,0xd0800085,0xd0c00085,0xd1000085,0xd1400085,0xd1800085,0xd1c00085 + .long 0xd2000085,0xd2400085,0xd2800085,0xd2c00085,0xd3000085,0xd3400085,0xd3800085,0xd3c00085 + .long 0xd4000085,0xd4400085,0xd4800085,0xd4c00085,0xd5000085,0xd5400085,0xd5800085,0xd5c00085 + .long 0xd6000085,0xd6400085,0xd6800085,0xd6c00085,0xd7000085,0xd7400085,0xd7800085,0xd7c00085 + .long 0xd8000085,0xd8400085,0xd8800085,0xd8c00085,0xd9000085,0xd9400085,0xd9800085,0xd9c00085 + .long 0xda000085,0xda400085,0xda800085,0xdac00085,0xdb000085,0xdb400085,0xdb800085,0xdbc00085 + .long 0xdc000085,0xdc400085,0xdc800085,0xdcc00085,0xdd000085,0xdd400085,0xdd800085,0xddc00085 + .long 0xde000085,0xde400085,0xde800085,0xdec00085,0xdf000085,0xdf400085,0xdf800085,0xdfc00085 + .long 0xe0000085,0xe0400085,0xe0800085,0xe0c00085,0xe1000085,0xe1400085,0xe1800085,0xe1c00085 + .long 0xe2000085,0xe2400085,0xe2800085,0xe2c00085,0xe3000085,0xe3400085,0xe3800085,0xe3c00085 + .long 0xe4000085,0xe4400085,0xe4800085,0xe4c00085,0xe5000085,0xe5400085,0xe5800085,0xe5c00085 + .long 0xe6000085,0xe6400085,0xe6800085,0xe6c00085,0xe7000085,0xe7400085,0xe7800085,0xe7c00085 + .long 0xe8000085,0xe8400085,0xe8800085,0xe8c00085,0xe9000085,0xe9400085,0xe9800085,0xe9c00085 + .long 0xea000085,0xea400085,0xea800085,0xeac00085,0xeb000085,0xeb400085,0xeb800085,0xebc00085 + .long 0xec000085,0xec400085,0xec800085,0xecc00085,0xed000085,0xed400085,0xed800085,0xedc00085 + .long 0xee000085,0xee400085,0xee800085,0xeec00085,0xef000085,0xef400085,0xef800085,0xefc00085 + .long 0xf0000085,0xf0400085,0xf0800085,0xf0c00085,0xf1000085,0xf1400085,0xf1800085,0xf1c00085 + .long 0xf2000085,0xf2400085,0xf2800085,0xf2c00085,0xf3000085,0xf3400085,0xf3800085,0xf3c00085 + .long 0xf4000085,0xf4400085,0xf4800085,0xf4c00085,0xf5000085,0xf5400085,0xf5800085,0xf5c00085 + .long 0xf6000085,0xf6400085,0xf6800085,0xf6c00085,0xf7000085,0xf7400085,0xf7800085,0xf7c00085 + .long 0xf8000085,0xf8400085,0xf8800085,0xf8c00085,0xf9000085,0xf9400085,0xf9800085,0xf9c00085 + .long 0xfa000085,0xfa400085,0xfa800085,0xfac00085,0xfb000085,0xfb400085,0xfb800085,0xfbc00085 + .long 0xfc000085,0xfc400085,0xfc800085,0xfcc00085,0xfd000085,0xfd400085,0xfd800085,0xfdc00085 + .long 0xfe000085,0xfe400085,0xfe800085,0xfec00085,0xff000085,0xff400085,0xff800085,0xffc00085 diff --git a/src/include/bootstate.h b/src/include/bootstate.h index 46662d5..80f69d2 100644 --- a/src/include/bootstate.h +++ b/src/include/bootstate.h @@ -22,7 +22,7 @@ #include <string.h>
/* Control debugging of the boot state machine. */ -#define BOOT_STATE_DEBUG 0 +#define BOOT_STATE_DEBUG 1
/* * The boot state machine provides a mechanism for calls to be made through- diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index dc08937..2555550 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -139,18 +139,23 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) sizeof(struct cbfs_stage), (void *) (uint32_t) stage->load, stage->len); + LOG("done., final_size is %d\n", final_size); if (!final_size) return (void *) -1;
/* Stages rely the below clearing so that the bss is initialized. */ memset((void *)((uintptr_t)stage->load + final_size), 0, stage->memlen - final_size); + ERROR("memset(%p, 0, %d)\n", (void *)((uintptr_t)stage->load + final_size), + stage->memlen - final_size); + LOG("memset done\n");
DEBUG("stage loaded.\n");
entry = stage->entry; // entry = ntohll(stage->entry);
+ ERROR("CALL %p\n", (void *)entry); return (void *) entry; }